并网逆变器参考设计指南(德州仪器).pdf

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设计指南:TIDM-HV-1PH-DCAC

并网逆变器参考设计

此参考设计使用C2000TM微控制器(MCU)实现了单相逆变器(直流/交流)控制.该设计支持两种递变器运行 模式:使用输出LC滤波器的电压源模式和使用输出LCL滤波器的并网模式.高效、低THD和直观的软件使此设计对从事UPS的逆变器设计以及替代能源应用 (例如,PV逆变器、电网存储、微电网)的工程师很有吸引力.可供此参考设计使用的硬件和软件可缩短上市时间.

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该TI参考设计术尾的重要声明表述了授权使用、知识产权问题和其他重要的免责声明和信息.

特性

应用

光电逆变器微电网电网存储:有源整流器

TEXASINSTRUMENTS

380V直流V、110Vms、60Hz、400VA最大输 出、20kHz开关频率效率约为97%超过50%额定功率时,总谐波失真小于2%提供powerSUITET支持,以使设计轻松适应用户要求具有SFRA和补偿设计器,从而轻松对控制环路进 行调优支持TMS320F28377D和TMS320F280049C

1 SystemDescription

WARNING

WARNING

present on the board.Electric shock ispossible.The Highvoltage!There are accessible highvoltagesboard operates at voltagesandcurrents that maycause shock fire orinjuryif notproperlor damaging property.For safety use of isolated test equipment with over-voltage and over-currentprotectionishighlyremended.Tl considersit the user'sresponsibility to confirm that the voltages andisolationrequirements are identified andunderstoodbefore energizing theboardor simulation.When energized do not touch the design or ponentsconnected to the design.

WARNING

WARNING

Do not leave the design powered when unattended.

sai ooud e yns sude uipesn e ( so pgenerate a regulated AC current to feed into the grid. The control design of this type of inverter may bechallenging as several algorithms are required to run the inverter. This reference design uses the C2000microcontroller (MCU) family of devices to implement control of a grid connected inverter with outputo bums ounban-uu o se ndno ue pue ( uoe ypm esnd busn peobridge as shown in [ 1. An inductor capacitor (LCL) output fiter is used on this reference design.

The design firmware is supported in the powerSUITE framework which enables easy adaptation of the uoezuoous pe so (m) doo paxoo eseud se yons swuoe Ae l uisep looo pue aeosu depe a snb ls e u po d soo ( su ood pfilter actively dampens the resonance of the LCL filter that is implemented.

started with the grid connected inverter design. jb o Ase pue se l! eyew ubisep euauean sun jo euemos engnu pue a mo oueoe yu eu

sno pe s o s n e xe unnno u n these signals. Many C200o MCUs have sigma-delta modulators to sense these parameters from thepower stage. Sigma-delta modulators provide easy isolation and high quality reading of the physical variables thus improving the overall quality of the control. Built-in sigma-delta demodulators on C2000MCUs make using sigma delta-based sensing straight forward and easy to use.

of the power stage which makes the design of digital control loop simple. The software frequency pute the modulation required for regulated operation. Compensation designer implements the modelresponse analyzer (SFRA) enables measurement of the frequency response in-circuit to verify the

1.1 KeySystemSpecifications

1 lists the key specifications of this reference design.

表1.Key System Specifications

PARAMETER DESCRIPTIONInput voltage (V) Typical 380-V DC absolute max 400-V DC 1.7 A maxOutput voltage (Vour) Input current (l) Typical 110 VisOutput current (lour) VA rating Absolute RMS max 4.5 A pulse max 10 A Absolute max 500 VATHDi 2% for greater than 50% rated loadOutput inductor Li Etficiency At 110 Vaus average is approximately 96% 3 mHOutput capacilor Cf 1μFOutput grid side inductance Lg Switching frequency 0.94 mH 20 kHz

2 SystemOverview

BlockDiagram2.1

图1.Typical Single Phase Inverter

2.2 SystemDesignTheory

2.2.1 Modulation Scheme

Popular modulation schemes for the PWM generation include bipolar modulation and unipolar modulation.This reference design uses a modified unipolar modulation in which switches Q1 and Q2 are switched at a(pu6 aui jo Aouanbeu) Aouenbauj mol e je pauoms ere t pue c sauoms pue Aouanben yu

generation of these signals easily. I 2 shows how the PWM peripheral is configured in this reference 表 2 lists the switching states of the inverter. The flexible PWM peripheral of the C2000 MCU enablesdesign. Ensure that the PWM waveform is symmetric around the zero crossing of the AC wave.

表2.SwitchingStatesUsed inTIDM-HV-1PH-DCAC

CYCLE Q1 Q2 Q3 Q4 VOLTAGE AT BRIDGE STATENO OFF OFF ON V 1Positive hall cycle OFF ON OFF OFF ON 0 2Negative half cycle OFF ON OFF ON NO ON OFF Vc 0 3 4

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